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Ⅻ International Symposium on Small Particles and Inorganic Clusters

作者： Jing Wang Di Wu Xiaoning Zhao Yanfeng Chen aidong li and naiben {3. laboratory of solid state Microstructures and department of materials science andengineering Nanjing University Nanjing 210093.China

＜正＞ A variety of ZnO nanostructures, including nanowires, nanorods, nanotetrapods, nanotubes, nanorod-nanoribbon junctions and nanorings, have been achieved by a thermal evaporation process. These nanoentities were characterized by X-ray diffraction, scanning electron microscopy and transmission electron microscopy （TEM）. All these nanoentities were found

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Challenges in Atomic-Scale Characterization of High-k Dielectrics and Metal Gate Electrodes for Advanced CMOS Gate Stacks

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Journal of materials science & Technology 2009年第3期25卷 289-313页

作者： Xinhua Zhu Jian-min Zhu aidong li Zhiguo liu {3. Ming National laboratory of solid state Microstructures Department of Physics Nanjing University Nanjing 210093 China

The decreasing feature sizes in complementary metal-oxide semiconductor （CMOS） transistor technology will require the replacement of SiO2 with gate dielectrics that have a high dielectric constant （high-k） because as the SiO2 gate thickness is reduced below 1.4 nm, electron tunnelling effects and high leakage currents occur in SiO2, which present serious obstacles to future device reliability. In recent years significant progress has been made on the screening and selection of high-k gate dielectrics, understanding their physical properties, and their integration into CMOS technology. Now the family of hafnium oxide-based {3. has emerged as the leading candidate for high-k gate dielectrics due to their excellent physical properties. It is also realized that the high-k oxides must be implemented in conjunction with metal gate electrodes to get sufficient potential for CMOS continue scaling. In the advanced nanoscale Si-based CMOS devices, the composition and thickness of interfacial layers in the gate stacks determine the critical performance of devices. Therefore, detailed atomic- scale understandings of the microstructures and interfacial structures built in the advanced CMOS gate stacks, are highly required. In this paper, several high-resolution electron, ion, and photon-based techniques currently used to characterize the high-k gate dielectrics and interfaces at atomic-scale, are reviewed. Particularly, we critically review the research progress on the characterization of interface behavior and structural evolution in the high-k gate dielectrics by high-resolution transmission electron microscopy （HRTEM） and the related techniques based on scanning transmission electron microscopy （STEM）, including high-angle annular dark- field （HAADF） imaging （also known as Z-contrast imaging）, electron energy-loss spectroscopy （EELS）, and energy dispersive X-ray spectroscopy （EDS）, due to that HRTEM and STEM have become essential metrology tools for characterizing the d

关键词： High-k gate dielectrics Metal gate electrodes, CMOS gate stack HRTEM STEM

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THE ROLE OF INTERFACIAL DIFFUSION IN SRBI2TA2O)9 THIN FILMS CAPACITORS

THE ROLE OF INTERFACIAL DIFFUSION IN SRBI2TA2O)9 THIN FILMS ...

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第8届国际材联电子材料国际研讨会

作者： aidong li, Di Wu, Huiqing ling, Xinhua Zhu, Tao Yu, Zhiguo liu, naiben Ming National laboratory of solid state Microstructures, Nanjing University, Nanjing 210093. P. R. China materials science and Engineering department, Nanjing University, Nanjing 210093. P. R. China Center for Advanced Studies in science and Technology of Microstructures, Nanjing 210093. P. R. China

During preparation of multilayer films, interracial diffusion critically affects film performance. In this report, SrBiTaO (SBT) thin films were prepared on Pt/TiO/SiO/Si substrates using metalorganic decomposition spin-on technique. Impact of different heat treatment processing, film thickness, top electrode postanneal and atmosphere anneal on interfacial diffusion has been investigated by X-ray diffraction (XRD),

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