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基于薄膜铌酸锂的双偏振光学模式复用器(特邀)

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光学学报 2024年第15期44卷 101-110页

作者：蒋永恒李星峰沈健肖恢芙袁明瑞张朴李颖弢张永苏翼凯田永辉兰州大学物理科学与技术学院甘肃兰州730000 上海交通大学区域光纤通信网与新型光通信系统国家重点实验室电子工程系上海200240

双偏振模式复用器由于只需要单个波长的激光源即可实现多信道复用,从而降低光链路的成本和功耗,目前已经受到研究人员的广泛关注。然而,由于绝缘体上铌酸锂(LNOI)平台中存在模式杂化现象,在该平台上制备双偏振模式复用器仍然具有一定的... 详细信息

双偏振模式复用器由于只需要单个波长的激光源即可实现多信道复用,从而降低光链路的成本和功耗,目前已经受到研究人员的广泛关注。然而,由于绝缘体上铌酸锂(LNOI)平台中存在模式杂化现象,在该平台上制备双偏振模式复用器仍然具有一定的挑战。本文在SiN-LNOI平台上提出并实验验证了具有6个数据通道的双偏振光学模式复用器,使用亚波长光栅调控不同模式的色散,以抑制模式杂化引入的串扰。所测得的器件插入损耗和模间串扰分别为3.1 dB和-10.1 dB。此外,成功演示了总净数据容量为1.52 Tbit/s的动态数据传输实验,这表明所提器件在未来高速大容量光通信中具有较大的应用潜力。

关键词：集成光学薄膜铌酸锂氮化硅偏振复用模式复用亚波长光栅

A high voltage silicon-on-insulator lateral insulated gate bipolar transistor with a reduced cell-pitch

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Chinese Physics B 2013年第2期22卷 429-433页

作者：罗小蓉王琦姚国亮王元刚雷天飞王沛蒋永恒周坤张波 State Key Laboratory of Electronic Thin Films and Integrated Devices University of Electronic Science and Technology of China

A high voltage（〉 600 V） integrable silicon-on-insulator（SOI） trench-type lateral insulated gate bipolar transistor（LIGBT） with a reduced cell-pitch is *** LIGBT features multiple trenches（MTs）：two oxide trenches in the drift region and a trench gate extended to the buried oxide（BOX）.Firstly,the oxide trenches enhance electric field strength because of the lower permittivity of oxide than that of ***,oxide trenches bring in multi-directional depletion,leading to a reshaped electric field distribution and an enhanced reduced-surface electric-field（RESURF） *** increase the breakdown voltage（BV）.Thirdly,oxide trenches fold the drift region around the oxide trenches,leading to a reduced ***,the oxide trenches enhance the conductivity modulation,resulting in a high electron/hole concentration in the drift region as well as a low forward voltage drop（Von）.The oxide trenches cause a low anode-cathode capacitance,which increases the switching speed and reduces the turn-off energy loss（Eoff）.The MT SOI LIGBT exhibits a BV of 603 V at a small cell-pitch of 24 μm,a Von of 1.03 V at 100 A/cm-2,a turn-off time of 250 ns and Eoff of 4.1×10？3 *** trench gate extended to BOX synchronously acts as dielectric isolation between high voltage LIGBT and low voltage circuits,simplifying the fabrication processes.

关键词： silicon-on-insulator lateral insulated gate bipolar transistor conductivity modulation breakdown voltage trench

An L-shaped low on-resistance current path SOI LDMOS with dielectric field enhancement

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Journal of Semiconductors 2014年第3期35卷 79-84页

作者：范叶罗小蓉周坤范远航蒋永恒王琦王沛罗尹春张波 State Key Laboratory of Electronic Thin Films and Integrated Devices University of Electronic Science and Technology of China

A low specific on-resistance（R on;sp/ SOI NBL TLDMOS（silicon-on-insulator trench LDMOS with an N buried layer） is proposed. It has three features： a thin N buried layer（NBL） on the interface of the SOI layer/buried oxide（BOX） layer, an oxide trench in the drift region, and a trench gate extended to the BOX ***, on the on-state, the electron accumulation layer forms beside the extended trench gate; the accumulation layer and the highly doping NBL constitute an L-shaped low-resistance conduction path, which sharply decreases the R on;sp. Second, in the y-direction, the BOX＇s electric field（E-field） strength is increased to 154 V/ m from48 V/ m of the SOI Trench Gate LDMOS（SOI TG LDMOS） owing to the high doping NBL. Third, the oxide trench increases the lateral E-field strength due to the lower permittivity of oxide than that of Si and strengthens the multiple-directional depletion effect. Fourth, the oxide trench folds the drift region along the y-direction and thus reduces the cell pitch. Therefore, the SOI NBL TLDMOS structure not only increases the breakdown voltage（BV）, but also reduces the cell pitch and R on;sp. Compared with the TG LDMOS, the NBL TLDMOS improves the BV by 105% at the same cell pitch of 6 m, and decreases the R on;sp by 80% at the same BV.

关键词： MOSFET silicon-on-insulator breakdown voltage specific on-resistance

Ultra-low specific on-resistance SOI double-gate trench-type MOSFET

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Journal of Semiconductors 2011年第10期32卷 49-52页

作者：雷天飞罗小蓉葛锐陈曦王元刚姚国亮蒋永恒张波李肇基 State Key Laboratory of Electronic Thin Films and Integrated Devices University of Electronic Science and Technology of China No.24 Research Institute of China Electronics Technology Group Corporation

An ultra-low specific on-resistance（R_（on,sp）） silicon-on-insulator（SOI） double-gate trench-type MOSFET （DG trench MOSFET） is *** MOSFET features double gates and an oxide trench：the oxide trench is in the drift region,one trench gate is inset in the oxide trench and one trench gate is extended into the buried ***,the double gates reduce R_（on,sp） by forming dual conduction ***,the oxide trench not only folds the drift region,but also modulates the electric field,thereby reducing device pitch and increasing the breakdown voltage（BV）.A BV of 93 V and a R_（on,sp） of 51.8 mΩ·mm^2 is obtained for a DG trench MOSFET with a 3μm half-cell *** with a single-gate SOI MOSFET（SG MOSFET） and a single-gate SOI MOSFET with an oxide trench（SG trench MOSFET）,the R_（on,sp） of the DG trench MOSFET decreases by 63.3%and 33.8% at the same BV,respectively.

关键词： double gates trench specific on-resistance breakdown voltage

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军医大学新生集训应激后成长及影响因素分析

第三军医大学学报 2012年第17期34卷 1793-1796页

作者：缪毅彭李李敏曹伟丽颜怀城蒋永恒汪涛第三军医大学护理系心理学教研室重庆400038 第三军医大学学员旅重庆400038

目的考察军医大学新生集训应激后成长及影响因素。方法 2011年某军医大学新生入学集训1个月后,采用Connor-Davidson回弹力问卷(CD-RISC)、应激后成长问卷(PTGI)、情绪调节方式问卷(ERS)、积极情感消极情感量表(PANAS)和情绪调节量表(ERQ... 详细信息

目的考察军医大学新生集训应激后成长及影响因素。方法 2011年某军医大学新生入学集训1个月后,采用Connor-Davidson回弹力问卷(CD-RISC)、应激后成长问卷(PTGI)、情绪调节方式问卷(ERS)、积极情感消极情感量表(PANAS)和情绪调节量表(ERQ)对来自不同地区的137名军校新生进行调查。结果①军校大学新生集训应激后成长与心理弹性(r=0.611,P<0.01)、抑制调节(r=0.309,P<0.01)、宣泄调节(r=0.333,P<0.01)、正性情绪(r=0.588,P<0.01)和认知重评(r=0.372,P<0.01)显著正相关,与负性情绪显著负相关(r=-0.204,P<0.05)。②军医大学新生应激后成长高分组在心理弹性、抑制/宣泄调节、正性情绪和认知重评得分上显著高于低分组(P<0.05,P<0.01)。③军医大学新生的心理弹性、抑制调节、正性情绪和认知重评能较好地预测应激后成长,解释率为53%。④心理弹性、抑制调节、正性情绪和认知重评直接正性影响应激后成长,且抑制调节、正性情绪和认知重评还可通过心理弹性间接正性影响应激后成长。结论心理弹性、抑制/宣泄调节、正/负性情绪和认知重评与应激后成长密切相关,且心理弹性、抑制调节、正性情绪和认知重评是应激后成长的重要影响因素。

关键词：集训军医大学新生应激后成长影响因素

A low on-resistance SOI LDMOS using a trench gate and a recessed drain

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Journal of Semiconductors 2012年第7期33卷 43-46页

作者：葛锐罗小蓉蒋永恒周坤王沛王琦王元刚张波李肇基 State Key Laboratory of Electronic Thin Films and Integrated Devices University of Electronic Science and Technology of China

An integrable silicon-on-insulator （SOl） power lateral MOSFET with a trench gate and a recessed drain （TGRD MOSFET） is proposed to reduce the on-resistance. Both of the trench gate extended to the buried oxide （BOX） and the recessed drain reduce the specific on-resistance （Ron, sp） by widening the vertical conduction area and shortening the extra current path. The trench gate is extended as a field plate improves the electric field distribution. Breakdown voltage （BV） of 97 V and Ron, sp of 0.985 mf2-cm2 （l/os = 5 V） are obtained for a TGRD MOSFET with 6.5/xm half-cell pitch. Compared with the trench gate SOI MOSFET （TG MOSFET） and the conventional MOSFET, Ron＇ sp of the TGRD MOSFET decreases by 46% and 83% at the same BV, respectively. Compared with the SOI MOSFET with a trench gate and a trench drain （TGTD MOSFET）, BV of the TGRD MOSFET increases by 37% at the same Ron,sp.

关键词： trench gate recessed drain on-resistance breakdown voltage

Eliminating the floating-body effects in a novel CMOS-compatible thin-SOI LDMOS

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Journal of Semiconductors 2013年第9期34卷 53-57页

作者：蒋永恒罗小蓉李燕妃王沛范叶周坤王琦胡夏融张波 State Key Laboratory of Electronic Thin Films and Integrated Devices University of Electronic Science and Technology of China

A novel CMOS-compatible thin film SOI LDMOS with a novel body contact structure is proposed. It has a Si window and a P-body extended to the substrate through the Si window, thus, the P-body touches the P＋ region to form the body contact. Compared with the conventional floating body SOI LDMOS （FB SOI LDMOS） structure, the new structure increases the off-state BV by 54%, decreases the specific on resistance by 20%, improves the output characteristics significantly, and suppresses the self-heating effect. Furthermore, the advantages of the low leakage current and low output capacitance of SOI devices do not degrade.

关键词： thin film SOI LDMOS body contact floating body effect parasitic BJT effect

Novel SOI double-gate MOSFET with a P-type buried layer

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Journal of Semiconductors 2012年第5期33卷 57-60页

作者：姚国亮罗小蓉王琦蒋永恒王沛周坤吴丽娟张波李肇基 State Key Laboratory of Electronic Thin Films and Integrated Devices University of Electronic Science and Technology of China Science and Technology on Analog Integrated Circuit Laboratory

An ultra-low specific on-resistance（R_（on,sp）） integrated silicon-on-insulator（SOI） double-gate triple RESURF（reduced surface field） n-type MOSFET（DG T-RESURF） is *** MOSFET features two structures： an integrated double gates structure（DG） that combines a planar gate with an extended trench gate,and a p-type buried layer（BP） in the n-type drift ***,the DG forms dual conduction channels and shortens the forward current path,so reducing R_（on,sp）.The DG works as a vertical field plate to improve the breakdown voltage （BV） ***,the BP forms a triple RESURF structure（T-RESURF）,which not only increases the drift doping concentration but also modulates the electric *** results in a reduced R_（on,sp） and an improved ***,the extended trench gate and the BP linked with the p-body region reduce the sensitivity of the BV to position of the *** BV of 325 V and R_（on,sp） of 8.6 mΩ·cm^2 are obtained for the DG T-RESURF by simulation. R_（on,sp） of DG T-RESURF is decreased by 63.4%in comparison with a planar-gate single RESURF MOSFET（PG S-RESURF）,and the BV is increased by 9.8%.

关键词： SOI double gates specific on-resistance RESURF breakdown voltage

A low on-resistance triple RESURF SOI LDMOS with planar and trench gate integration

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Chinese Physics B 2012年第6期21卷 560-564页

作者：罗小蓉姚国亮张正元蒋永恒周坤王沛王元刚雷天飞张云轩魏杰 State Key Laboratory of Electronic Thin Films and Integrated Devices.University of Electronic Science and Technology of China No.24 Research Institute of China Electronics Technology Group Corporation

A low on-resistance （Ron,sp） integrable silicon-on-insulator （SOI） n-channel lateral double-diffused metal-oxide-semiconductor （LDMOS） is proposed and its mechanism is investigated by simulation. The LDMOS has two features： the integration of a planar gate and an extended trench gate （double gates （DGs））; and a buried P-layer in the N-drift region, which forms a triple reduced surface field （RESURF）（TR） structure. The triple RESURF not only modulates the electric field distribution, but also increases N-drift doping, resulting in a reduced specific on-resistance （Ron,sp） and an improved breakdown voltage （BV） in the off-state. The DGs form dual conduction channels and, moreover, the extended trench gate widens the vertical conduction area, both of which further reduce the Ron,sp. The BV and Ron,sp are 328 V and 8.8 mΩ·cm^2, respectively, for a DG TR metal-oxide semiconductor field-effect transistor （MOSFET） by simulation. Compared with a conventional SOI LDMOS, a DG TR MOSFET with the same dimensional device parameters as those of the DG TR MOSFET reduces Ron,sp by 59% and increases BV by 6%. The extended trench gate synchronously acts as an isolation trench between the high-voltage device and low-voltage circuitry in a high-voltage integrated circuit, thereby saving the chip area and simplifying the fabrication processes.

关键词： SOI electric field breakdown voltage trench gate specific on-resistance