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Detailed Analysis of Chip Scale Atomic Clock Impact on Satel...

Detailed Analysis of Chip Scale Atomic Clock Impact on Satellite Signal Collaborative Tracking

作     者:Changhui Jiang Yu Chen Shuai Chen Bohao Wang Yuwei Chen Juha Hyypp? 

作者单位:School of Automation Nanjing University of Science and Technology 

会议名称:《第十二届中国卫星导航年会》

会议日期:2021年

学科分类:080802[工学-电力系统及其自动化] 0808[工学-电气工程] 08[工学] 080401[工学-精密仪器及机械] 081105[工学-导航、制导与控制] 0804[工学-仪器科学与技术] 0825[工学-航空宇航科学与技术] 0811[工学-控制科学与工程] 

关 键 词:Vector tracking Graph Optimization Covariance Adaptation 

摘      要:Vector Tracking Loop(VTL) is an advanced satellite signal tracking method for obtaining better navigation solutions under signal challenging environments. In VTL, a navigation filter is employed for estimating the navigation solutions using the measurements from the Code/Frequency discriminators. The measurements from the discriminators are obtained from the integration of local and received signal correlation results. Mutual aiding between channels is realized through the navigation solutions collaborative estimation. However, local frequency base or time reference definitely has significant impact on the discriminator’s outputs. A better local clock with more stable frequency will augment the VTL signal tracking performance. Chip Scale Atomic Clock is a recently popular frequency base for various applications;it performs much better timekeeping capacity than traditional Temperature Compensate X’tal(crystal) Oscillator(TCXO). In this paper, the CSAC’s influence on the discriminators outputs and signal tracking were analyzed and presented, and specifically, following two problems were investigated: 1) how the CSAC improves the discriminators measurements and the numerical results were presented;2) how the CSAC influence the signal tracking, the new signal tracking parameters calculation was presented with CSAC as the time reference. Finally, an immediate frequency data was utilized to validate the analysis, the results showed that the CSAC could reduce the Doppler error and Code phase error;the Clock drift could be excluded while updating the signal tracking parameters.

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