Energy Consumption Reduction with Low Computational Needs in Multicore Systems with Energy-Performance Tradeoff
作者单位：NeCS Project-TeamINRIA-GIPSA-lab-CNRS
会议名称：《Joint 48th IEEE Conference on Decision and Control and 28th Chinese Control Conference》
会议日期：2009年
学科分类：08[工学] 081201[工学-计算机系统结构] 0812[工学-计算机科学与技术（可授工学、理学学位）]
基 金：supported by the NeCS ProjectTeam (INRIA, GIPSA-lab, CNRS) in the ARAVIS project context ARAVIS project is a Minalogic project gathering ST Microelectonics with academic partners of different fields, namely TIMA and CEA-LETI for micro-electronics and INRIA for operating system and control
摘 要：A two voltage level electronic device is interesting because the clock frequency and the supply voltage level could be reduced（respecting certain rules） in order to decrease the energy consumption. We proposed in a previous paper a robust control architecture to deal with this power-performance tradeoff and we are now interested in extending this principle for several devices which works together since they are all supplied with the same voltage and clock frequency. Thus, an intuitive multicore control strategy which duplicates the whole monocore architecture as much as devices is compared with a second strategy where the duplication is reduced as much as possible. It appears that the proposal clearly gives a low control computational needs with the same reduction of the energy consumption.