Low Power and Concurrency Optimization of the Computational Unit for DSP Processors Based on Software

作     者：Xin Zhang Jie Chen XiaoXu Guo BaoFeng Li Microelectronics R&D Center of the Chinese Academy of Sciences Beijing 100029 China 

会议名称：《第五届专用集成电路国际会议（ASICON）》

会议日期：2003年

学科分类：08[工学] 081201[工学-计算机系统结构] 0812[工学-计算机科学与技术（可授工学、理学学位）] 

关 键 词：Computational unit shift-add low power. concurrency. 

摘      要：正DSP （Digital Signal Processing） processors have been more and more applied in all kinds of products. Real time processing and low power is marked character for them, and the computational unit in DSP Processors performs numeric processing for DSP algorithms and is bottle-neck for improving the performance of DSP processors. In this paper, we present a path of low power and concurrency exploitation in a general 16-bit fixed programmable DSP processors working on 200MHz, by which the computation performance is improved and the power is reduced by more than 35% based on software.