A Novel Configurable Boundary-scan Circuit Design of SRAM-Based FPGA

作     者：Chenguang Guo Yanlong Zhang Zhiping Wen Lei Chen Xuewu Li Zengrong Liu Min Wang Beijing Microelectronics Tech.Institution (BMTI) Beijing China 

会议名称：《2011 IEEE International Conference on Computer Science and Automation Engineering(CSAE 2011)》

会议日期：2011年

学科分类：080902[工学-电路与系统] 0809[工学-电子科学与技术（可授工学、理学学位）] 08[工学] 

关 键 词：Configurable Boundary-scan SRAM cell FPGA 

摘      要：This paper presents a novel configurable boundaryscan circuit （CBSC） of SRAM-based field programmable gate array （FPGA）.The embedded SRAM cells of FPGA have been used to modify the original structure of boundary-scan circuit （BSC）.Users only need to change the data stored in the embedded SRAM cell during the configuration of the FPGA *** this way,the boundary-scan chain can be configured to any desired *** with the original structure of BSC,this circuit using 0.25μm CMOS process can be part of a standard digital cell library and has been used in the BQV series FPGAs of BMTI.