Verification of Datapaths Based on World Level Polynomial
作者单位：College of Computer Science and TechnologyHarbin Engineering University College of Computer ScienceQufu Normal University
会议名称：《2008 9th International Conference on Solid-State and Integrated-Circuit Technology》
会议日期：2008年
学科分类：08[工学] 081201[工学-计算机系统结构] 0812[工学-计算机科学与技术（可授工学、理学学位）]
关 键 词：[IEEE Keyword]Taylor series Algorithm design and analysis Data structures Integrated circuit modeling Input variables Boolean functions Polynomials
摘 要：正A reduced,canonical,weighted generalized list（WGL） is presented in this *** representation can effective describe world-level polynomial *** reduction rules of WGL were proposed,and the equivalence verification method of register transfer level （RTL） design based on WGL was implemented. Experimental results show that WGL is more effective than other existent model,when it is used for the equivalent verification of RTL design.