An ASIC Implementation of MPEG Audio Decoders

作     者：Hongsheng Zhang Mingying Lu Guoyu Wang Chongqing University of Posts and Telecommunications PhD student of Xian Jiaotong University 

会议名称：《2007 7th International Conference on ASIC Electronic Version(ASICON 2007)》

会议日期：2007年

学科分类：080903[工学-微电子学与固体电子学] 080902[工学-电路与系统] 0809[工学-电子科学与技术（可授工学、理学学位）] 08[工学] 

摘      要：This paper presents a low power consumption and low cost MPEG audio decoder design *** ASIC implementation of MPEG Layer II audio decoder is *** decoder just uses 20 K logic gates and the power consumption is only 10 mW using 0.18 micron CMOS *** development of MPEG4 AAC decoder using similar architecture is covered as well.