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文献详情 >A 0.18μm CMOS 10-Gb/S Multicha... 收藏
A 0.18μm CMOS 10-Gb/S Multichannel Transmitter with Duty-cy...

A 0.18μm CMOS 10-Gb/S Multichannel Transmitter with Duty-cycle Correction

作     者:Jinghua YE Gan GUO Lin HUANQ Yihui CHEN Xuefeng CHEN Zhiliang HONG Microelectronic Dept Fudan University Shanghai 200433 China 

会议名称:《第五届专用集成电路国际会议(ASICON)》

会议日期:1000年

学科分类:080202[工学-机械电子工程] 08[工学] 0802[工学-机械工程] 

关 键 词:Ethernet Transmitter Duty-cycle correction (DCC) Linedriver 

摘      要:正This paper describes a multichannel transceiver targeting IEEE 802.3ae (10-Gb/s) Ethernet standard using 0.18 μm CMOS process. The transmitter sets features: 1) Multiphase clock to multiplex the data;2) Duty-cycle correction (DCC) circuit to adjust the clock pulse width;3) Current-mode linedriver to drive transmitter medium. Through simulation, the total jitter (peak-to-peak) is 45ps, power dissipation is 140mW, and total latency is 24ns. Differential output voltage swing of transmitter is 1.6V.

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