High throughput bandwidth optimized VLSI design for motion compensation in AVS HDTV decoder

作     者：Kai LUO Dong-xiao LI Ming ZHANG 

作者机构：Department of lnformation Science and Electronic Engineering Zhejiang University Hangzhou 310027 China 

出 版 物：《Journal of Zhejiang University-Science A(Applied Physics & Engineering)》 (浙江大学学报（英文版）A辑（应用物理与工程）)

年 卷 期：2008年第9卷第6期

页      面：822-832页

核心收录：

学科分类：0810[工学-信息与通信工程] 08[工学] 0805[工学-材料科学与工程（可授工学、理学学位）] 081001[工学-通信与信息系统] 0812[工学-计算机科学与技术（可授工学、理学学位）] 

基　　金：(No. Y106574) supported by the Natural Science Foundationof Zhejiang Province  China 

主　　题：带宽 最优化 设计方案 通信技术 

摘      要：In this paper we present a motion compensation (MC) design for the newest Audio Video coding Standard (AVS) of China. Because of compression-efficient techniques of variable block size (VBS) and sub-pixel interpolation, intensive pixel calculation and huge memory access are required. We propose a parallel serial filtering mixed luma interpolation data flow and a three-stage multiplication free chroma interpolation scheme. Compared to the conventional designs, the integrated architecture supports about 2.7 times filtering throughput. The proposed MC design utilizes Vertical Z processing order for reference data re-use and saves up to 30% memory bandwidth. The whole design requires 44.3k gates when synthesized at 108 MHz clock frequency using 0.18-μm CMOS technology and can support up to 1920×1088@30 fps AVS HDTV video decoding.