Regular FPGA based on regular fabric

作     者：陈迅 朱剑文 张民选 

作者机构：School of ComputerNational University of Defense Technology Department of Electrical and Computer EngineeringUniversity of TorontoTorontoONM5S3G4Canada 

出 版 物：《Journal of Semiconductors》 (半导体学报（英文版）)

年 卷 期：2011年第32卷第8期

页      面：155-162页

核心收录：

学科分类：0821[工学-纺织科学与工程] 0808[工学-电气工程] 0809[工学-电子科学与技术（可授工学、理学学位）] 080902[工学-电路与系统] 08[工学] 0805[工学-材料科学与工程（可授工学、理学学位）] 0703[理学-化学] 082104[工学-服装设计与工程] 0702[理学-物理学] 

主　　题：FPGA layout automation design for manufacturability regular design fabric 

摘      要：In the sub-wavelength regime,design for manufacturability（DFM） becomes increasingly important for field programmable gate arrays（FPGAs）.In this paper,an automated tile generation flow targeting micro-regular fabric is *** a publicly accessible,well-documented academic FPGA as a case study,we found that compared to the tile generators previously reported,our generated micro-regular tile incurs less than 10%area overhead,which could be potentially recovered by process window optimization,thanks to its superior printability. In addition,we demonstrate that on 45 nm technology,the generated FPGA tile reduces lithography induced process variation by 33%,and reduce probability of failure by 21.2%.If a further overhead of 10%area can be recovered by enhanced resolution,we can achieve the variation reduction of 93.8%and reduce the probability of failure by 16.2%.