A Combinational Power Analysis Method against Cryptographic Hardware

作     者：GUO Zheng GU Dawu LU Haining LIU Junrong XU Sen BAO Sigang GU Haihua 

作者机构：School of Electronic Information and Electrical EngineeringShanghai JiaoTong University Shanghai Viewsource Information Science & Technology Co.Ltd. Shanghai Huahong Integrated Circuit Co.Ltd. 

出 版 物：《China Communications》 (中国通信（英文版）)

年 卷 期：2015年第12卷第1期

页      面：99-107页

核心收录：

学科分类：0810[工学-信息与通信工程] 08[工学] 081001[工学-通信与信息系统] 

基　　金：supported by Major State Basic Research Development Program(No. 2013CB338004) National Natural Science Foundation of China(No.61402286, 61202372,61202371,61309021) National Science and Technology Major Project of the Ministry of Science and Technology of China (No.2014ZX01032401-001) 

主　　题：cryptographic hardware side channel attack power analysis combinational logic 

摘      要：Power analysis is a non-invaslve attack against cryptographic hardware, which effectively exploits runtime power consumption characteristics of circuits. This paper proposes a new power model which combines Hamming Distance model and the model based on the template value of power consumption in combinational logic circuit. The new model can describe the power consumption characteristics of sequential logic circuits and those of combinational logic as well. The new model can be used to improve the existing power analysis methods and detect the information leakage of power consumption. Experimental results show that, compared to CPA（Correlation Power Analysis） method, our proposed attack which adopt the combinational model is more efficient in terms of the number of required power traces.