Modeling and understanding of the frequency dependent HPM upset susceptibility of the CMOS inverter

作     者：YU XinHai CHAI ChangChun LIU Yang YANG YinTang 

作者机构：Key Laboratory of Ministry of Education for Wide Band-Gap Semiconductor Materials and DevicesSchool of Microelectronics Xidian University 

出 版 物：《Science China(Information Sciences)》 (中国科学:信息科学(英文版))

年 卷 期：2015年第58卷第8期

页      面：182-192页

核心收录：

学科分类：080903[工学-微电子学与固体电子学] 0810[工学-信息与通信工程] 0808[工学-电气工程] 0809[工学-电子科学与技术（可授工学、理学学位）] 08[工学] 0812[工学-计算机科学与技术（可授工学、理学学位）] 

基　　金：supported by National Basic Research Program of China(973 Program)(Grant No.2014CB3399-00) Open Fund of Key Laboratory of Complex Electromagnetic Environment Science and Technology,China Academy of Engineering Physics(CAEP)(Grant No.2015-0214.XY.K) 

主　　题：high power microwave frequency upset CMOS analytical model 

摘      要：In this paper, we interpret and, for the first time, model a frequency dependent high-power microwave(HPM) upset susceptibility. We constructed the analytical models of the total amount of injected charges N inj, the excess carrier density distribution in P-Substrate, and the frequency dependent HPM upset susceptibility level. The models are validated by simulated results and experimental data, respectively. Results reveal that N inj is proportional to fαwhile the exponent α should be adjusted to-0.525. The excess carrier density distribution behaves the frequency dependence as well; the dependence is attributable to the fact that the AC field within the CMOS inverter varies too rapidly for the carriers to follow at high frequency. Meanwhile,the HPM upset susceptibility level is a decreasing function of f. The f dependent HPM upset susceptibility model is verified to be reliable and able to quickly estimate the susceptibility level of CMOS inverter considering IC technology, layout parameters, pulse properties, and operating environment simultaneously. Besides, the empirical formula P = A · fαis proposed to provide instant estimation to the HPM upset power threshold. In conclusion, by aid of the analytical model, we acquired the influence of the layout parameter LB on the HPM susceptibility and demonstrated that the CMOS inverter with minor LB is more susceptible to HPM.