Modeling of program Vth distribution for 3-D TLC NAND flash memory

作     者：Kunliang WANG Gang DU Zhiyuan LUN Wangyong CHEN Xiaoyan LIU 

作者机构：Institute of Microelectronics Peking University Huawei Technologies Co. Ltd. 

出 版 物：《Science China(Information Sciences)》 (中国科学:信息科学(英文版))

年 卷 期：2019年第62卷第4期

页      面：187-196页

核心收录：

学科分类：08[工学] 081201[工学-计算机系统结构] 0812[工学-计算机科学与技术（可授工学、理学学位）] 

基　　金：supported by National Key Research and Development Plan (Grant No. 2016YFA0202101) National Natural Science Foundation of China (Grant No. 61421005) National High-Tech R&D Program (863 Program) (Grant No. 2015AA016501) 

主　　题：modeling and simulation measurement reliability program Vth distribution charge-trapping memory 3-D vertical channel TLC/QLC NAND flash memory 

摘      要：This paper proposes a simulation method to model the program Vth distribution of 3-D vertical channel TLC/QLC charge-trapping NAND flash memory. The program Vth distribution can be calculated by considering ISPP noise, WL-WL interference, and the RTN effect of tunneling oxide and poly Si, which are the major physical factors affecting the width of program Vth distribution. Then, the program Vth distribution shapes with different ISPP incremental voltage steps are compared, and the results are found to be consistent with the experimental results. Code and layer-dependent coupling coefficients of WL-WL interference in 3-D vertical channel NAND flash memory are considered. The effect of RTN on the program Vth distribution is comprehensively studied. The program Vth distribution of a WL is calibrated with the measurement, and a good agreement is obtained, validating the array program Vth distribution simulation method. The simulation method can help in improving the reliability of 3-D TLC NAND flash memory and provides guidance for the design and optimization of 3-D QLC NAND flash memory technology.