Full-IC manufacturability check based on dense silicon imaging

作     者：YANXiaolang SHIZheng CHENYe MAYue GAOGensheng 

作者机构：InstituteofVLSIDesignZhejiangUniversityHangzhou310027China 

出 版 物：《Science in China(Series F)》 (中国科学（F辑英文版）)

年 卷 期：2005年第48卷第4期

页      面：533-544页

核心收录：

学科分类：1305[艺术学-设计学（可授艺术学、工学学位）] 0810[工学-信息与通信工程] 13[艺术学] 0808[工学-电气工程] 08[工学] 080203[工学-机械设计及理论] 081304[工学-建筑技术科学] 0802[工学-机械工程] 0813[工学-建筑学] 0812[工学-计算机科学与技术（可授工学、理学学位）] 080201[工学-机械制造及其自动化] 

基　　金：the National Natural Science Foundation of China(Grant Nos.60176015 , 90207002) the Hi—Tech R&D(863)Program of China(Grant Nos.2002AA1Z1460 , 2003AA1Z1370) 

主　　题：RET OPC PSM design for manufacturability photolithography simulation. 

摘      要：With the increased design complexities brought in by applying different Reticle Enhancement Technologies (RETs) in nanometer-scale IC manufacturing process, post-RET sign-off verification is quickly becoming necessary. By introducing innovative algorithms for lithographic modeling, silicon imaging and yield problem locating, this paper describes a new methodology of IC manufacturability verification based on Dense Silicon Imaging (DSI). Necessity of imaging based verification is analyzed. Existing post-RET verification methods are reviewed and compared to the new methodology. Due to the greatly improved computational efficiency produced by algorithms such as the ~16*log2N/log2M times faster Specialized FFT, DSI based manufacturability checks on full IC scale, which were impractical for applications before, are now realized. Real verification example has been demonstrated and studied as well.