Design of DC-DC Converter for Flash Memory IPs
Design of DC-DC Converter for Flash Memory IPs作者机构:Department of electronic engineering Chanwon National University Changwon South Korea
出 版 物:《Engineering(科研)》 (工程(英文)(1947-3931))
年 卷 期:2013年第5卷第1期
页 面:142-145页
学科分类:080903[工学-微电子学与固体电子学] 0809[工学-电子科学与技术(可授工学、理学学位)] 08[工学]
主 题:Flash memory CHCI DC-DC converter charge pump low-voltage
摘 要:A DC-DC converter for flash memory IPs performing erasing by the FN (Fowler-Nordheim) tunneling and programming by the CHEI (channel hot electron injection) is designed in this paper. For the DC-DC converter for flash memory IPs using a dual voltage of VDD (=1.5V±0.15V)/VRD (=3.1V±0.1V), a scheme of using VRD (Read Voltage) instead of VDD is proposed to reduce the pumping stages and pumping capacitances of its charge pump circuit. VRD (=3.1V±0.1V) is a regulated voltage by a voltage regulator with an external voltage of 5V, which is used as the WL activation voltage in the read mode and an input voltage of the charge pump. The designed DC-DC converter outputs positive voltages of VP6V (=6V), VP8V (=8V) and VP9V(=9V);and a negative voltage of? VM8V (=-8V) in the write mode.