Capacitor Pattern H-Bridge Multilevel Inverter (CPHMLI) Using Phase Diposition Pulse Width Modulation for Grid Applications
Capacitor Pattern H-Bridge Multilevel Inverter (CPHMLI) Using Phase Diposition Pulse Width Modulation for Grid Applications作者机构：Department of ECE Mahendra College of Engineering Salem India Department of EEE KSR Institute for Engineering and Technology Tiruchengode India
出 版 物：《Circuits and Systems》 (电路与系统（英文）)
年 卷 期：2016年第7卷第10期
页 面：3310-3319页
学科分类：080902[工学-电路与系统] 0809[工学-电子科学与技术（可授工学、理学学位）] 08[工学]
主 题：Switched Capacitor Multilevel Inverter Phase Diposition Pulse Width Modulation Capacitor Pattern Based Multilevel Inverter Total Harmonic Distortion Cascaded H-Bridge 17-Level Inverter
摘 要：This work presents an implementation of an innovative single phase multilevel inverter using capacitors with reduced switches. The proposed Capacitor pattern H-bridge Multilevel Inverter (CPHMLI) topology consists of a proper number of Capacitor connected with switches and power sources. The advanced switching control supplied by Pulse Width Modulation (PDPWM) to attain mixed staircase switching state. The charging and discharging mode are achieved by calculating the voltage error at the load. Furthermore, to accomplish the higher voltage levels at the output with less number of semiconductors switches and simple commutation designed using CPHMLI topology. To prove the performance and effectiveness of the proposed approach, a set of experiments performed under various load conditions using MATLAB tool.
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