A wideband frequency synthesizer with VCO and AFC co-design for fast calibration

作     者：楼立恒 孙玲玲 高海军 詹海挺 

作者机构：Institute of VLSIZhejiang University Key Laboratory of RF Circuits and SystemsMinistry of EducationHangzhou Dianzi University 

出 版 物：《Journal of Semiconductors》 (半导体学报（英文版）)

年 卷 期：2013年第34卷第1期

页      面：107-112页

核心收录：

学科分类：080904[工学-电磁场与微波技术] 080902[工学-电路与系统] 0809[工学-电子科学与技术（可授工学、理学学位）] 08[工学] 

基　　金：Project supported by the Major State Basic Research Development Program of China (No.2010CB327403) the National Natural Science Foundation of China (No.61102027) the Natural Science Foundation of Zhejiang Province,China (No.Y1110991) 

主　　题：frequency synthesizer fractional-N AFC KVCO bandwidth CMOS 

摘      要：A wideband fractional-N frequency synthesizer is implemented in a 65 nm CMOS *** employs a wideband LC voltage-controlled oscillator（VCO） with optimized VCO gain（KVCO/and a sub-band step to improve automatic frequency calibration（AFC） efficiency at negligible expense of phase noise *** agile AFC is realized by direct mapping based on the division ratio,and optional redundant counting and comparing calibration is introduced accommodating PVT variations,which samples the reference clock using the prescaled VCO output as a discriminating clock.A charge pump with switched charging current is adopted to compensate for the loop bandwidth *** results show this directly-mapped AFC locates the target sub-band in 100 ns and only needs 1.2 s for redundant *** frequency synthesizer spans a frequency range from 0.62 to 1.52 GHz,with phase noise of-86 dBc/Hz at 10 kHz offset and-122 dBc/Hz at 1 MHz offset while consuming 9.76 mA from a 1.2 V supply.