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Organic-semiconductor: Polymer-electret blends for high-performance transistors

Organic-semiconductor: Polymer-electret blends for high-performance transistors

作     者:Peng Wei Shengtao Li Dongfan Li Han Yu Xudong Wang Congcong Xu Yaodong Yang Laju Bu Guanghao Lu 

作者机构:Frontier Institute of Science and Technology and State Key Laboratory of Electrical Insulation and Power Equipment Xi'an Jiaotong University Xi'an 7100S4 China School of Science Xi'an Jiaotong University Xi'an 710049 China 

出 版 物:《Nano Research》 (纳米研究(英文版))

年 卷 期:2018年第11卷第11期

页      面:5835-5848页

核心收录:

学科分类:0808[工学-电气工程] 0809[工学-电子科学与技术(可授工学、理学学位)] 07[理学] 0805[工学-材料科学与工程(可授工学、理学学位)] 0702[理学-物理学] 

基  金:This work is financially supported by the National Natural Science Foundation of China (Nos. 51473132 and 21574103) and China Postdoctoral Science Foundation (Nos. 2015M580841 and 2016T90910). G. L. thanks Cyrus Tang Foundation and the Fundamental Research Funds for the Central Universities. The authors are grateful to Wanlong Lu  Yuming Qiu  Ziyu Wang  Yupeng Hu  and Xinyuan Dong for experimental assistance and fruitful discussion 

主  题:organic field-effect transistors organic electronics vertical phase separation gate stress polymer electrets C 12 -BTBT 

摘      要:As compared with polymer semiconductors, solution-processed small-molecule semiconductors usually have poorer film-formation properties, which induces wide variations in device performance in terms of mobility and threshold voltage, thus severely limiting their commercial applications. In this work, we propose an easily accessible method to improve the performance and reduce the variability of small-molecule organic field-effect transistors (OFETs) by blending organic semiconductors with an insulator polymer, which is subsequently post-treated by gate stress to generate an electret. By blending the organic semiconductor 2,7-didodecyl[1]benzothieno[3,2-b][1]benzothiophene (C12-BTBT) with the insulator polystyrene, uniform transport layers with vertically phase segregated morphology are obtained, from which the mobility and threshold voltage of OFETs are largely manipulated. The OFETs exhibit field-effect mobilities as high as 7.5 cm2·V−1·s−1 with an on/off ratio exceeding 106 in ambient conditions. This double-layer structure provides an appropriate architecture for applying gate-stress to inject charges into the insulating layer, forming an electret. The generation of the electret is thermally accelerated and thus can be easily realized under moderate gate-stress at elevated temperature (e.g., 60 °C). After cooling, the electret layer serves as a floating-gate, which not only continuously tunes the threshold voltage and field-effect mobility, but also helps minimize the contact resistances and optimize the subthreshold swing. As an application of this method, a digital inverter is built and its performance is optimized via in situ tuning of its individual transistors.

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