A DESIGN OF 0.25μm CMOS SWITCH

作     者：Han Lei Yang Tao Xie Jun Wang Yong You Yu Zhang Bo Han Lei* ** Yang Tao** Xie Jun* Wang Yong* You Yu* Zhang Bo** *(Chengdu Goldtel Microelectronics Co., Ltd, Chengdu 611731, China)* **(School of Microelectronics and Solid-State Electronics, University of Electronic Science & Technology of China, Chengdu 610054, China)

作者机构：Chengdu G oldtel Microelectronics Co. Ltd Chengdu 611731 China School of Microelectronics and Solid-State Electronics University of Electronic Science ＆ Technology of China Chengdu 610054 China 

出 版 物：《Journal of Electronics(China)》 (电子科学学刊（英文版）)

年 卷 期：2006年第23卷第5期

页      面：745-747页

学科分类：080901[工学-物理电子学] 0809[工学-电子科学与技术（可授工学、理学学位）] 08[工学] 

基　　金：Partially supported by the National Natural Science Foundation of China (No.60501012) 

主　　题：RF (Radio-Frequency) CMOS (Complementary Metal Oxide Semiconductor) Switch Insertion loss Gate Series Resistance (GSR) Switch time 

摘      要：Single-Pole Double-Throw （SPDT） broadband switch has been designed in a 0.25gm Complementary Metal Oxide Semiconductor （CMOS） process. To optimize the performance of isolation and insertion loss, based on normal design, the effects of Gate Series Resistances （GSR） on insertion loss and switching time are analyzed for the first time. The compatible GSRs are chosen by the analyses. The fabricated chips were tested and the results show the switch isolation from DC （Direct Current） to 1GHz exhibits 55dB and insertion loss lower than 2.1 dB.