A Fuzzy Logic Based Power-Efficient Run-Time Reconfigurable Multicore System
A Fuzzy Logic Based Power-Efficient Run-Time Reconfigurable Multicore System作者机构：Electrical Engineering Department Riphah International University School of Computer Science and Electronic Engineering University of Essex Electrical Engineering Department HITEC University Department of Electrical Engineering COMSATS Institute of Information Technology
出 版 物：《Chinese Journal of Electronics》 (电子学报(英文))
年 卷 期：2018年第27卷第3期
页 面：549-555页
核心收录：
学科分类：0808[工学-电气工程] 0809[工学-电子科学与技术（可授工学、理学学位）] 08[工学] 0701[理学-数学] 081201[工学-计算机系统结构] 0812[工学-计算机科学与技术（可授工学、理学学位）]
基 金：National ICT R&D Fund Pakistan(No.ICTRDF/TR&D/2012/65)
主 题：DVFS Fuzzy logic controller Energy Throughput
摘 要：Increasing demand for better throughput and performance has motivated designers to come up with more sophisticated processors with innovative designs. Such designs for multicore architectures offer large amount of parallelism which is often underutilized and thus becomes overhead and liability. Due to these advancements, there has been a exponential increase in power consumption and heat dissipation of computing devices. Under these circumstances, an ideal system would be a reconfigurable system that can switch off all underutilized resources and work with only required ones. There is a need of reconfigurable computing devices and processors that are smart enough to configure themselves dynamically on runtime to find balance between throughput and power-consumption. This paper proposes a novel fuzzy logic based Dynamic voltage and frequency scaling(DVFS)and power-gating enabled controller which is capable of reducing power-consumption without affecting throughput and overall performance of the system. The design is implemented on Intel processor using Ubuntu as an operating system. Implementation results show that proposed Fuzzy logic controller(FLC) reduces power-consumption upto 40% by reconfiguring the processor dynamically without compromising the throughput.
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