Wide-range tracking technique for process-variation-robust clock and data recovery applications

作     者：Jun-sheng LV You LI Yu-mei ZHOU Jian-zhong ZHAO Hai-hua SHEN Feng ZHANG 

作者机构：Institute of MicroelectronicsChinese Academy of SciencesBeijing 100029China University of Chinese Academy of SciencesBeijing 100029China 

出 版 物：《Frontiers of Information Technology & Electronic Engineering》 (信息与电子工程前沿（英文版）)

年 卷 期：2017年第18卷第5期

页      面：729-737页

核心收录：

学科分类：080903[工学-微电子学与固体电子学] 0809[工学-电子科学与技术（可授工学、理学学位）] 08[工学] 

基　　金：Project supported by the National High-Tech R&D Program(863)of China(No.2011AA010403) the National Natural Science Foundation of China(No.61474134) 

主　　题：Clock and data recovery Digital loop filter Phase interpolator 

摘      要：A wide-range tracking technique for clock and data recovery(CDR) circuit is presented. Compared to the traditional technique, a digital CDR controller with calibration is adopted to extend the tracking range. Because of the use of digital circuits in the design, CDR is not sensitive to process and power supply variations. To verify the technique, the whole CDR circuit is implemented using 65-nm CMOS technology. Measurements show that the tracking range of CDR is greater than ±6×10-3 at 5 Gb/s. The receiver has good jitter tolerance performance and achieves a bit error rate of 10–12. The re-timed and re-multiplexed serial data has a root-mean-square jitter of 6.7 ps.