A trimming technique for capacitive SAR ADC as sensor interface
A trimming technique for capacitive SAR ADC as sensor interface作者机构:Institute of Microelectronics Chinese Academy of Sciences
出 版 物:《Journal of Semiconductors》 (半导体学报(英文版))
年 卷 期:2015年第36卷第12期
页 面:128-134页
核心收录:
学科分类:0808[工学-电气工程] 0809[工学-电子科学与技术(可授工学、理学学位)] 080902[工学-电路与系统] 08[工学] 080202[工学-机械电子工程] 0805[工学-材料科学与工程(可授工学、理学学位)] 0703[理学-化学] 0802[工学-机械工程] 0702[理学-物理学]
基 金:supported by the National Natural Science Foundation of China(No.61204034)
主 题:SAR ADC trimming sensor CMOS
摘 要:This work presented a trimming technique and algorithm applied in a capacitive successive approximation register(SAR) analog to digital converter(ADC) for a sensor interface, which can be integrated with the preceding sensor and the following controlling circuit. Without spending a special calibration phase or adding complicated functions, this circuit keeps a 12-bit resolution by trimming the capacitor array. Its merits of low power and small area make it suitable to be embedded in a power and cost sensitive system such as a battery-supplied sensor network node. The prototype 12-bit ADC is implemented by 0.5 m 2P3M CMOS technology, with the wide supply range of 2–5 V, its power consumption is only 300 A at a sampling speed of 200 kHz.