SSA-over-array(SSoA):A stacked DRAM architecture for nearmemory computing

作     者：Xiping Jiang Fujun Bai Song Wang Yixin Guo Fengguo Zuo Wenwu Xiao Yubing Wang Jianguo Yang Ming Liu 

作者机构：Institute of Microelectronics of the Chinese Academy of SciencesBeijing 100029China School of Integrated CircuitsUniversity of Chinese Academy of SciencesBeijing 100029China Xi’an UniIC SemiconductorsXi’an 710075China School of MicroelectronicsUniversity of Science and Technology of ChinaHefei 230026China 

出 版 物：《Journal of Semiconductors》 (半导体学报（英文版）)

年 卷 期：2024年第45卷第10期

页      面：42-53页

核心收录：

学科分类：08[工学] 0702[理学-物理学] 0812[工学-计算机科学与技术（可授工学、理学学位）] 

基　　金：supported in part by the Strategic Priority Research Program of the Chinese Academy of Sciences under Grant No.XDB44000000 

主　　题：near-memory vertical stacking SSA bandwidth density 

摘      要：Aiming to enhance the bandwidth in near-memory computing,this paper proposes a SSA-over-array(SSoA)*** relocating the secondary sense amplifier(SSA)from dynamic random access memory(DRAM)to the logic die and repositioning the DRAM-to-logic stacking interface closer to the DRAM core,the SSoA overcomes the layout and area limitations of SSA and master DQ(MDQ),leading to improvements in DRAM data-width density and frequency,significantly enhancing bandwidth *** quantitative evaluation results show a 70.18 times improvement in bandwidth per unit area over the baseline,with a maximum bandwidth of 168.296 Tbps/*** believe the SSoA is poised to redefine near-memory computing development strategies.