Efficient Interconnect Network Model for Linear Circuit Reduction

作     者：陈彬 杨华中 罗嵘 汪蕙 Chen Bin;YANG Huazhong;Luo Rong;Wang Hui

作者机构：清华大学电子工程系北京100084 

出 版 物：《Journal of Semiconductors》 (半导体学报（英文版）)

年 卷 期：2003年第24卷第9期

页      面：916-920页

核心收录：

学科分类：080902[工学-电路与系统] 0809[工学-电子科学与技术（可授工学、理学学位）] 08[工学] 

基　　金：国家高技术研究发展计划资助项目 (编号 :2 0 0 2AA1Z14 6 0 )~~ 

主　　题：moment matching MPVL process linear circuit reduction 

摘      要：A new interconnect network model for linear netw ork reduction is *** this new model,the ports of the interconnect network are classified into two groups:active and passive *** the classification,some proprieties of the interconnect network are found to be redundant and pruned before *** common interconnect networks,the scale of reduced models is smaller than 50% of the scale of previous works.