Research and Design of Reconfigurable Composite Field Multiplication in Symmetric Cipher Algorithms
Research and Design of Reconfigurable Composite Field Multiplication in Symmetric Cipher Algorithms作者机构:Key Laboratory of Information Security Engineering University of Chinese People's Armed Police Force
出 版 物:《Wuhan University Journal of Natural Sciences》 (武汉大学学报(自然科学英文版))
年 卷 期:2016年第21卷第3期
页 面:235-241页
核心收录:
学科分类:081203[工学-计算机应用技术] 08[工学] 0835[工学-软件工程] 0812[工学-计算机科学与技术(可授工学、理学学位)]
基 金:Supported by the National Natural Science Foundation of China(61202492,61309022,61309008) the Natural Science Foundation for Young of Shaanxi Province(2013JQ8013)
主 题:reconfigurable composite field multiplication symmetric cipher algorithm RISC VLIW (very long instruction word)
摘 要:The composite field multiplication is an important and complex module in symmetric cipher algorithms, and its realization performance directly restricts the processing speed of symmetric cipher algorithms. Based on the characteristics of composite field multiplication in symmetric cipher algorithms and the realization principle of its reconfigurable architectures, this paper describes the reconfigurable composite field multiplication over GF((2^8)k) (k=1,2,3,4) in RISC (reduced instruction set computer) processor and VLIW (very long instruction word) processor architecture, respectively. Through configuration, the architectures can realize the composite field multiplication over GF(2^8), GF ((2^8)2), GF((28)3) and GF((28)4) flexibly and efficiently. We simulated the function of circuits and synthesized the reconfigurable design based on the 0.18 μm CMOS (complementary metal oxide semiconductor) standard cell library and the comparison with other same kind designs. The result shows that the reconfigurable design proposed in the paper can provide higher efficiency under the premise of flexibility.