A 256 Gb/s electronic−photonic monolithically integrated transceiver in 45 nm CMOS

作     者：Ang Li Qianli Ma Yujun Xie Yongliang Xiong Yingjie Ma Han Liu Ye Jin Menghan Yang Guike Li Haoran Yin Minye Zhu Yang Qu Peng Wang Daofa Wang Wei Li Liyuan Liu Nan Qi Ming Li Ang Li;Qianli Ma;Yujun Xie;Yongliang Xiong;Yingjie Ma;Han Liu;Ye Jin;Menghan Yang;Guike Li;Haoran Yin;Minye Zhu;Yang Qu;Peng Wang;Daofa Wang;Wei Li;Liyuan Liu;Nan Qi;Ming Li

作者机构：Key Laboratory of Optoelectronic Materials and DevicesInstitute of SemiconductorsChinese Academy of SciencesBeijing 100083China Institute of SemiconductorsChinese Academy of SciencesBeijing 100083China Center of Materials Science and Optoelectronics EngineeringUniversity of Chinese Academy of SciencesBeijing 100190China School of ElectronicElectrical and Communication EngineeringUniversity of Chinese Academy of SciencesBeijing 100049China 

出 版 物：《Journal of Semiconductors》 (半导体学报（英文版）)

年 卷 期：2024年第45卷第7期

页      面：7-10页

核心收录：

学科分类：08[工学] 0803[工学-光学工程] 

基　　金：This work was supported by the National Natural Science Foundation of China(Grant Nos.61925505 92373209 and 62235017) 

主　　题：Gb/s transceiver monolithic 

摘      要：With the explosive development of artificial intelligence(AI),machine learning(ML),and high-performance comput-ing(HPC),the ever-growing data movement is asking for high density interconnects with higher bandwidth(BW),lower power and lower latency[1−3].The optical I/O leverages silicon photonic(SiPh)technology to enable high-density large-scale integrated photonics.