Efficient Clustering and Simulated Annealing Approach for Circuit Partitioning

作     者：SANDEEP Singh Gill RAJEEVAN Chandel ASHWANI Kumar Chandel 

作者机构：Department of Electronics and Communication EngineeringGuru Nanak Dev Engineering College National Institute of Technology 

出 版 物：《Journal of Shanghai Jiaotong university(Science)》 (上海交通大学学报（英文版）)

年 卷 期：2011年第16卷第6期

页      面：708-712页

核心收录：

学科分类：080903[工学-微电子学与固体电子学] 0809[工学-电子科学与技术（可授工学、理学学位）] 08[工学] 

主　　题：cut size non polynomial hard partitioning simulated annealing interconnections very large scale integration(VLSI) design 

摘      要：Circuit net list bipartitioning using simulated annealing technique has been proposed in the *** method converges asymptotically and probabilistically to global *** circuit net list is partitioned into two partitions such that the number of interconnections between the partitions is *** proposed method begins with an innovative clustering technique to obtain a good initial *** obtained show the versatility of the proposed method in solving non polynomial hard problems of circuit net list partitioning and show an improvement over those available in literature.