Optimization of Quantum Cost for Low Energy Reversible Signed/Unsigned Multiplier Using Urdhva-Tiryakbhyam Sutra
作者机构：Benha Faculty of EngineeringBenha University BenhaEgypt Arab Academy for ScienceTechnology and Maritime Transport-Arab LeagueCairoEgypt
出 版 物：《Computer Systems Science & Engineering》 (计算机系统科学与工程（英文）)
年 卷 期：2023年第46卷第8期
页 面：1827-1844页
核心收录：
学科分类：07[理学] 0701[理学-数学] 070101[理学-基础数学]
主 题：Vedic multiplier Urdhava Tiryakbhyam reversible logic signed/unsigned multiplier B2C
摘 要：One of the elementary operations in computing systems is ***,high-speed and low-power multipliers design is mandatory for efficient computing *** designing low-energy dissipation circuits,reversible logic is more efficient than irreversible logic circuits but at the cost of higher *** paper introduces an efficient signed/unsigned 4×4 reversible Vedic multiplier with minimum quantum *** Vedic multiplier is considered fast as it generates all partial product and their sum in one *** paper proposes two reversible Vedic multipliers with optimized quantum cost and garbage ***,the unsigned Vedic multiplier is designed based on the Urdhava Tiryakbhyam(UT)*** multiplier consists of bitwise multiplication and adder *** with Vedic multipliers in the literature,the proposed design has a quantum cost of 111 with a reduction of 94%compared to the previous *** has a garbage output of 30 with optimization of the best-compared ***,the proposed unsigned multiplier is expanded to allow the multiplication of signed numbers as well as unsigned *** signed Vedic multipliers are presented with the aim of obtaining more optimization in performance *** has separate binary two’s complement(B2C)and MUX circuits,while DesignII combines binary two’s complement and MUX circuits in one *** shows the lowest quantum cost,231,regarding *** has a quantum cost of 199,reducing to 86.14%of *** functionality of the proposed multiplier is simulated and verified using XILINX ISE 14.2.
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