Introducing scalable 1-bit full adders for designing quantum-dot cellular automata arithmetic circuits

作     者：Hamideh KHAJEHNASIR-JAHROMI Pooya TORKZADEH Massoud DOUSTI Hamideh KHAJEHNASIR-JAHROMI;Pooya TORKZADEH;Massoud DOUSTI

作者机构：Department of Electrical and Computer EngineeringScience and Research BranchIslamic Azad UniversityTehran ***Iran 

出 版 物：《Frontiers of Information Technology & Electronic Engineering》 (信息与电子工程前沿（英文版）)

年 卷 期：2022年第23卷第8期

页      面：1264-1276页

核心收录：

学科分类：08[工学] 081201[工学-计算机系统结构] 081202[工学-计算机软件与理论] 0812[工学-计算机科学与技术（可授工学、理学学位）] 

主　　题：Quantum-dot cellular automata(QCA) Full adder Ripple carry adder(RCA) Add/sub circuit Multiplier 

摘      要：Designing logic circuits using complementary metal-oxide-semiconductor(CMOS)technology at the nano scale has been faced with various challenges *** leakage currents,the short-effect channel,and high energy dissipation are some of the ***-dot cellular automata(QCA)represent an appropriate alternative for possible CMOS replacement in the future because it consumes an insignificant amount of energy compared to the standard *** key point of designing arithmetic circuits is based on the structure of a 1-bit full adder.A low-complexity full adder block is beneficial for developing various intricate *** paper represents scalable 1-bit QCA full adder structures based on cell *** proposed full adders encompass preference aspects of QCA design,such as a low number of cells used,low latency,and small area ***,the proposed structures have been expanded to larger circuits,including a 4-bit ripple carry adder(RCA),a 4-bit ripple borrow subtractor(RBS),an add/sub circuit,and a 2-bit array *** designs were simulated and verified using QCA Designer-E version *** tool can estimate the energy dissipation as well as evaluate the performance of the *** results showed that the proposed designs are efficient in complexity,area,latency,cost,and energy dissipation.