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The circuit design and optimization of quantum multiplier and divider

The circuit design and optimization of quantum multiplier and divider

作     者:Hai-Sheng Li Ping Fan Haiying Xia Gui-Lu Long Hai-Sheng Li;Ping Fan;Haiying Xia;Gui-Lu Long

作者机构:College of Electronic EngineeringGuangxi Normal UniversityGuilin 541004China College of Information EngineeringEast China JiaoTong UniversityNanchang 330013China Department of PhysicsTsinghua UniversityBeijing 100084China State Key Laboratory of Low-Dimensional Quantum PhysicsTsinghua UniversityBeijing 100084China Beijing National Research Center for Information Science and TechnologyBeijing 100084China Beijing Academy of Quantum Information SciencesBeijing 100193China 

出 版 物:《Science China(Physics,Mechanics & Astronomy)》 (中国科学:物理学、力学、天文学(英文版))

年 卷 期:2022年第65卷第6期

页      面:11-25页

核心收录:

学科分类:0809[工学-电子科学与技术(可授工学、理学学位)] 080902[工学-电路与系统] 07[理学] 08[工学] 070201[理学-理论物理] 0702[理学-物理学] 

基  金:This work was supported by the National Natural Science Foundation of China(Grant Nos.61762012,61763014,and 62062035) the Science and Technology Project of Guangxi(Grant No.2020GXNSFDA238023). 

主  题:quantum multiplier quantum divider quantum fault-tolerant circuit quantum computing 

摘      要:A fault-tolerant circuit is required for robust quantum computing in the presence of noise.Clifford+T circuits are widely used in fault-tolerant implementations.As a result,reducing T-depth,T-count,and circuit width has emerged as important optimization goals.A measure-and-fixup approach yields the best T-count for arithmetic operations,but it requires quantum measurements.This paper proposes approximate Toffoli,TR,Peres,and Fredkin gates with optimized T-depth and T-count.Following that,we implement basic arithmetic operations such as quantum modular adder and subtractor using approximate gates that do not require quantum measurements.Then,taking into account the circuit width,T-depth,and T-count,we design and optimize the circuits of two multipliers and a divider.According to the comparative analysis,the proposed multiplier and divider circuits have lower circuit width,T-depth,and T-count than the current works that do not use the measure-and-fixup approach.Significantly,the proposed second multiplier produces approximately 77%T-depth,60%T-count,and 25%width reductions when compared to the existing multipliers without quantum measurements.

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