Design and optimization of a gate-controlled dual direction electro-static discharge device for an industry-level fluorescent optical fiber temperature sensor

作     者：Yang WANG Xiangliang JIN Jian YANG Feng YAN Yujie LIU Yan PENG Jun LUO Jun YANG Yang WANG;Xiangliang JIN;Jian YANG;Feng YAN;Yujie LIU;Yan PENG;Jun LUO;Jun YANG

作者机构：School of Physics and ElectronicsHunan Normal UniversityChangsha410081 China School of Mechatronic Engineering and AutomationShanghai UniversityShanghai200444 China Faculty of EngineeringWestern UniversityLondonONN6A 3K7Canada 

出 版 物：《Frontiers of Information Technology & Electronic Engineering》 (信息与电子工程前沿（英文版）)

年 卷 期：2022年第23卷第1期

页      面：158-170页

核心收录：

学科分类：080202[工学-机械电子工程] 08[工学] 0802[工学-机械工程] 

基　　金：Project supported by the National Natural Science Foundation of China(No.61827812) the Huxiang High-Level Talents Gathering Project of Science and Technology Department of Hunan Province,China(No.2019RS1037) the Innovation Project of Science and Technology Department of Hunan Province,China(Nos.2020GK2018,2019GK4016,and 2020RC1003) the Postgraduate Scientific Research Innovation Project of Hunan Province,China(No.CX20200478) 

主　　题：Electric breakdown Semiconductor device reliability CMOS technology 

摘      要：The input/output(I/O)pins of an industry-level fluorescent optical fiber temperature sensor readout circuit need on-chip integrated high-performance electro-static discharge(ESD)protection *** is difficult for the failure level of basic N-type buried layer gate-controlled silicon controlled rectifier(NBL-GCSCR)manufactured by the 0.18µm standard bipolar-CMOS-DMOS(BCD)process to meet this ***,we propose an on-chip integrated novel deep N-well gate-controlled SCR(DNW-GCSCR)with a high failure level to effectively solve the problems based on the same semiconductor *** computer-aided design(TCAD)simulation is used to analyze the device *** are tested by transmission line pulses(TLP)to obtain accurate ESD *** holding voltage(24.03 V)of NBL-GCSCR with the longitudinal bipolar junction transistor(BJT)path is significantly higher than the holding voltage(5.15 V)of DNW-GCSCR with the lateral SCR path of the same ***,the failure current of the NBL-GCSCR device is 1.71 A,and the failure current of the DNW-GCSCR device is 20.99 *** the gate size of DNW-GCSCR is increased from 2µm to 6µm,the holding voltage is increased from 3.50 V to 8.38 *** optimized DNW-GCSCR(6µm)can be stably applied on target readout circuits for on-chip electrostatic discharge protection.