A survey of in-spin transfer torque MRAM computing
A survey of in-spin transfer torque MRAM computing作者机构:National ASIC System Engineering Research CenterSoutheast University Laboratoire Traitement et Communication de l'InformationTélécom Paris Nanjing Prochip Electronic Technology Co.Ltd.
出 版 物:《Science China(Information Sciences)》 (中国科学:信息科学(英文版))
年 卷 期:2021年第64卷第6期
页 面:30-44页
核心收录:
学科分类:08[工学] 081201[工学-计算机系统结构] 0812[工学-计算机科学与技术(可授工学、理学学位)]
基 金:supported by National Natural Science Foundation of China (Grant No. 61904028)
主 题:spin-transfer torque-magnetoresistive random access memory in-memory computing magnetic tunnel junction analog computing nonvolatile memory Boolean logic neural network
摘 要:In traditional von Neumann computing architectures, the essential transfer of data between the processor and memory hierarchies limits the computational efficiency of next-generation *** emerging in-memory computing(IMC) approach addresses this issue and facilitates the movement of significant data and rapid computations. Among the different memory types, intrinsic energy efficiency is demonstrated by in-magnetic random access memory(MRAM) computing with a low-power spintronic magnetic tunnel junction device and hybrid integration at an advanced complementary metal-oxide semiconductor node. This study reviews state-of-the-art techniques for managing IMC with an emphasis on spin-transfer torque-MRAM computing via design schemes at the bit-cell, circuit, and system levels. In addition, this study presents effective design techniques and potential challenges and demonstrates the existing limitations of in-MRAM computing and potential methods for overcoming these issues. This study also considers the design technology co-optimization from the IMC perspective.