Low Area PRESENT Cryptography in FPGA Using TRNG-PRNG Key Generation

作     者：T.Kowsalya R.Ganesh Babu B.D.Parameshachari Anand Nayyar Raja Majid Mehmood 

作者机构：Department of Electronic and Communication EngineeringMuthayammal Engineering CollegeRasipuramNamakkalTamilnaduIndia Department of Electronics and Communication EngineeringSRM TRP Engineering CollegeTiruchirappalliTamilnaduIndia Department of Telecommunication EngineeringGSSS Institute of Engineering and Technology for WomenMysuruIndia Faculty of Information TechnologyGraduate SchoolDuy Tan UniversityDa Nang550000Viet Nam Department of Information and Communication TechnologySchool of Electrical and Computer EngineeringXiamen University MalaysiaSepang43900Malaysia 

出 版 物：《Computers, Materials & Continua》 (计算机、材料和连续体（英文）)

年 卷 期：2021年第68卷第8期

页      面：1447-1465页

核心收录：

学科分类：0831[工学-生物医学工程（可授工学、理学、医学学位）] 0808[工学-电气工程] 0809[工学-电子科学与技术（可授工学、理学学位）] 08[工学] 0805[工学-材料科学与工程（可授工学、理学学位）] 0701[理学-数学] 0801[工学-力学（可授工学、理学学位）] 0812[工学-计算机科学与技术（可授工学、理学学位）] 

基　　金：supported by the Xiamen University Malaysia Research Fund(XMUMRF)(Grant No:XMUMRF/2019-C3/IECE/0007) 

主　　题：Dual port read only memory hardware utilization lightweight cryptography malicious attackers present block cipher pseudo random number generator true random number generator 

摘      要：Lightweight Cryptography(LWC)is widely used to provide integrity,secrecy and authentication for the sensitive ***,the LWC is vulnerable to various constraints such as high-power consumption,time consumption,and hardware utilization and susceptible to the malicious *** order to overcome this,a lightweight block cipher namely PRESENT architecture is proposed to provide the security against malicious *** True Random Number Generator-Pseudo Random Number Generator(TRNG-PRNG)based key generation is proposed to generate the unpredictable keys,being highly difficult to predict by the ***,the hardware utilization of PRESENT architecture is optimized using the Dual port Read Only Memory(DROM).The proposed PRESENT-TRNGPRNG architecture supports the 64-bit input with 80-bit of key *** performance of the PRESENT-TRNG-PRNG architecture is evaluated by means of number of slice registers,flip flops,number of slices Look Up Table(LUT),number of logical elements,slices,bonded input/output block(IOB),frequency,power and *** input retrieval performances analyzed in this PRESENT-TRNG-PRNG architecture are Peak Signal to Noise Ratio(PSNR),Structural Similarity Index(SSIM)and Mean-Square Error(MSE).The PRESENT-TRNG-PRNG architecture is compared with three different existing PRESENT architectures such as PRESENT On-TheFly(PERSENT-OTF),PRESENT Self-Test Structure(PRESENT-STS)and PRESENT-Round Keys(PRESENT-RK).The operating frequency of the PRESENT-TRNG-PRNG is 612.208 MHz for Virtex 5,which is high as compared to the PRESENT-RK.