Reconfigurable logic circuit design for stateful Boolean logic computing

作     者：Li LUO Zhekang DONG Xiaofang HU Lidan WANG Shukai DUAN Li LUO;Zhekang DONG;Xiaofang HU;Lidan WANG;Shukai DUAN

作者机构：College of Electronic and Information EngineeringSouthwest University Brain-inspired Computing & Intelligent Control of Chongqing Key Lab School of Electronics and InformationHangzhou Dianzi University College of Artificial IntelligenceSouthwest University 

出 版 物：《Science China(Information Sciences)》 (中国科学:信息科学(英文版))

年 卷 期：2021年第64卷第8期

页      面：260-261页

核心收录：

学科分类：0808[工学-电气工程] 0809[工学-电子科学与技术（可授工学、理学学位）] 080902[工学-电路与系统] 08[工学] 0812[工学-计算机科学与技术（可授工学、理学学位）] 

基　　金：supported by National Key Research and Development Program of China (Grant Nos. 2018YFB1306600, 2018YFB1306604) National Natural Science Foundation of China (Grant Nos. 61672436, 61601376, 61976246) Fundamental Research Funds for the Provincial Universities (Grant No. GK199900299012-010) 

主　　题：Reconfigurable logic circuit design for stateful Boolean logic computing 

摘      要：Dear editor,The conventional von Neumann computer system has the memory wall problem [1], which limits the computation speed and causes high energy and latency of the computing system. To realize computing systems able to process massive data and complex computing tasks with high efficiency,a key and viable approach is in-memory computing.Memristor-based stateful logic design is a promising candidate for realizing the in-memory logic computing [2].